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?2008 scillc. all rights reserved. publication order number: june 2008 ? rev. 3 amis 39100/d amis-39100 octal high side driver with protection 1.0 general description the amis-39100 is a general purpose ic with eight integrated high side (hs) output drivers. the device is designed to control t he power of virtually any type of load in a 12v automotive en vironment, such as transistor gates, relays, leds etc. each of the output drivers of the amis-39100 is able to drive up to 275ma cont inuously when connected to an inductive load of 3 00mh. even higher driver output currents can be ob tained as long as the total current of the device is limited. the integrated charge -pump of the amis-39100, which uses only one low cost external capacitor, avoids thermal runaways even if the battery voltage is low. th e hs drivers withstand short to ground (even when amis-39100 has lost its ground connection), short to the battery and has over-curr ent limitation. in case of a potential hazar dous situation, the drivers are switched off and the diagnostic state of the hs drivers can be read out via serial peripheral interface (spi). in case of a short to ground, the output driver is deactivated after a de-bounce tim e. the amis-39100 can be connected to a 3.3v or 5v microcontroller by means of a spi interface. this spi interface is used to cont rol each of the output drivers individually (on or off) and to read the stat us of each individual out put driver (read-back of possible error conditions). this allows the de tection of error situations for each driver indi vidually. furthermore, the spi interface can be used to read- back the status of the built-in thermal sh utdown protection. the amis-39100 has a low- power mode and excellent handling and sys tem esd characteristics. 2.0 key features ? eight high-side drivers ? up to 830ma continuous current per driver pair (resistive load) ? charge pump with one external capacitor ? serial peripheral interface (spi) ? short-circuit protection ? diagnostic features ? power-down mode ? internal thermal shutdown ? 3.3v and 5v microcontroller compliant ? excellent system esd ? automotive compliant ? so28 package with low r thja 3.0 typical applications ? automotive dashboard ? automotive load management ? actuator control ? led driver applications ? relays and solenoids ? industrial process control
amis-39100 4.0 ordering information product name package shipping configuration temperature range AMIS39100PNPB3G psop 300-28 (jedec ms-013) tube/tray -40c to 85c amis39100pnpb3rg psop 300-28 (jedec ms-013) tape & reel -40c to 85c rev. 3 | page 2 of 19 | www.onsemi.com
amis-39100 5.0 block diagram figure 1: block diagram rev. 3 | page 3 of 19 | www.onsemi.com
amis-39100 6.0 typical application diagram figure 2: typical application diagram 6.1 external components it is important to properly decouple the power supplies of the chip with external capacitors that have good high frequency prop erties. the vb1, vb2, vb3, and vb4 pins are shorted on the pcb level. al so gnd1, gnd2, gnd3, gnd4, gnd5, gnd6, test, test1, and test2 are shorted on the pcb level. table 1: external components component function min. value max. tol. [%] units c vb decoupling capacitor; x7r 100 20 nf c charge_pump charge pump capacitor (1) 0.47 47 nf c out (2) emc capacitor on connector 1 nf c out (2) decoupling capacitors on out 1 to 8; 50v 22 20 nf c vdd decoupling capacitors; 50v 22 20 nf r load load resistance 65 10 ? l load load inductance at maximum current 300 350 mh notes: (1) the capacitor must be placed close to the amis-39100 pins on the pcb. (2) both capacitors are optional and depend on the final application and board layout. rev. 3 | page 4 of 19 | www.onsemi.com
amis-39100 7.0 pin description figure 3: pin description of the amis-39100 rev. 3 | page 5 of 19 | www.onsemi.com
amis-39100 table 2: pin out pin name description 1 test1 connect to gnd 2 clk schmitt trigger spi clk input 3 wr schmitt trigger spi write enable input 4 out1 hs driver output 5 vb1 battery supply 6 out2 hs driver output 7 gnd1 power ground and thermal dissipation path junction-to-pcb 8 gnd2 power ground and thermal dissipation path junction-to-pcb 9 out3 hs driver output 10 vb2 battery supply 11 out4 hs driver output 12 din spi input pin (schmitt trigger or cmos inverter) 13 dout digital three state output for spi 14 test2 connect to gnd 15 gnd3 power ground and thermal dissipation path junction-to-pcb 16 test connect to gnd 17 capa1 charge pump capacitor pin 18 out5 hs driver output 19 vb3 battery supply 20 out6 hs driver output 21 gnd4 power ground and thermal dissipation path junction-to-pcb 22 gnd5 power ground and thermal dissipation path junction-to-pcb 23 out7 hs driver output 24 vb4 battery supply 25 out8 hs driver output 26 pdb schmitt trigger power-down input 27 vddn digital supply 28 gnd6 power ground and thermal dissipation path junction-to-pcb rev. 3 | page 6 of 19 | www.onsemi.com
amis-39100 8.0 electrical and environmental ratings 8.1 absolute maximum ratings stress levels above those listed in this paragraph may cause immediate and permanent device failure. it is not recommended tha t more than one of these conditi ons be applied simultaneously. table 3: absolute maximum ratings symbol description min. max. unit vddn power supply voltage gnd - 0.3 6 v vb dc battery supply on pins vb1 to vb4, load dump, pulse 5b 400ms gnd - 0.3 35 v iout_on maximum output current outx pins (1) the hs driver is switched on -3000 350 ma iout_off maximum output current outx pins (1) the hs driver is switched off -350 350 ma i_out_vb maximum output current vb1, 2, 3, 4 pins -700 3750 ma vcapa1 dc voltage on pin capa1 0 vs+16.5 v vdig_in voltage on digital inputs clk, pdb, wr, din -0.3 vddn+0.3 v v esd pins that connect the application (pins vb1..4 and out1..8) (2) a ll other pins (2) -4 -2 +4 +2 kv kv v esd esd according charged device model (3) -750 +750 v tj junction temperature (t<100 hours) -40 175 c tmr a mbient temperature under bias -40 105 c notes: (1) the power dissipation of the chip must be limited not to exceed the maximum junction temperature tj. (2) according to hbm standard mil-std-883 method 3015.7. (3) according to norm eos/esd-stm5.3.1-1999 robotic mode. 8.2 thermal characteristics table 4: thermal characteristics of the package symbol description conditions value unit r th(vj-a) thermal resistance from junction to ambient in power-so28 package in free air 145 k/w table 5: thermal characteristics of the amis-39100 on a pcb pcb design conductivity top and bottom layer r thja (1) unit two layer (35um) copper planes according to figure 4 + 25% copper for the remaining areas 24 k/w rev. 3 | page 7 of 19 | www.onsemi.com
amis-39100 t wo layer (35um) copper planes according to figure 4 + 0% copper for the remaining areas 53 k/w four layer jedec: 25% copper coverage 25 k/w eia/jesd51-7 one layer jedec: eia/jesd51-3 25% copper coverage 46 k/w note: (1) these values are informative only. r thja = thermal resistance fr om junction to ambient 114.3 76.2 5 mm 5 mm 5 m m gnd c opper 5 mm t op pcb view 114.3 76.2 ground plane gnd copper 25 % filled by gnd copper bottom pcb view rev. 3 | page 8 of 19 | www.onsemi.com
amis-39100 figure 4: layout recommendation for thermal characteristics rameters operation o tside the ope y. total cumulative dwell time above th e ating rating ess than 100 hours. s below are ges 8.3 electrical pa u maximum oper rating ranges for extended periods may affect device reliabilit for the power supply or temperature must be l the parameter independent from load type (see section 8.4 ). 8.3.1. operating ran table 6: operating ranges symbol description min. max. unit vddn digital power supply voltage 3.1 5.5 v vdig_in voltage on digital inputs clk, pdb, wr, din -0.3 vddn v vb (1) dc battery supply on pins vb1 to vb4 3.5 16 v tamb a mbient temperature -40 105 c note: (1) the power dissipation o ot to exceed maximum junction temperature tj of 130c. .3.2. electrical characteristics table 7: electrical characteristics f the chip must be limited n 8 symbol description min. max. unit i_vb_norm (1) consumption on vb without load currents in normal mode of operation pdb = high 3.5 ma i_pdb_3.3 (1)(2) sum of vb and vddn consumption in power down mode of operation pdb = low, vddn 3.3v, vb = 12v, 23c ambient 25 a clk and wr are at vddn voltage i_pdb_5 (1)(2) sum of vb and vddn consumption in power down mode of operation pdb = low, vddn 5v, vb = 24v, 23c ambient 40 a clk and wr are at vddn voltage i_pdb_max_vb vb consumption in power down mode of operation pdb = low, vb = 16v 10 a i_vddn_norm (1) consumption on vddn in normal mode of operation pdb = high 1.6 ma clk is 500khz, vddn = 5.5v, vb = 16v r_on_1..8 on resistance of the output drivers 1 through 8 vb= 16v (normal battery conditions and tamb = 25c) vb = 4.6v (worst case vs power supply condition and tamb = 25c) 1 : 3 : i_out_lim_x (1) internal over-current limitation of hs driver outputs 0.65 2 a t_shortgnd_hsdoff the time from short of hs driver outx pin to gnd and the driver deactivation; driver is off detection works from vb minimum of 7v 5,4 s vddn minimum is 3v tsd_h (1) high tsd threshold for junction te mperature (temperature rising) 130 170 c tsd_hyst tsd hysteresis for junction temperature 9 18 c rev. 3 | page 9 of 19 | www.onsemi.com
amis-39100 exceed maximum junction temperature tj. cause permanent device failure. parameter ads are specified in following categories: for inductiv inductiv 00mh and t up to 105c . parameters for resistiv notes: (1) the power dissipation of the chip must be limited not to the cumulative operatio ed above may (2) n time mention 8.4 load specific parameters high-side driver s for specific lo a. parameters b. parameters for e loads up to 350mh and t ambient up to 105c e loads up to 3 ambient e loads and t ambient up to 85c c rev. 3 | page 10 of 19 | www.onsemi.com
amis-39100 table 8: load specific characteristics a. ind uctive load till 3 50mh and t ambient up to 105c symbol description min. max. unit i_out_on_max. maximum output per hs driver, all eight drivers might be active simultaneously 240 ma b. ind uctive load till 300mh and t ambient up to 105c i_out_ on_max. maximum output per hs driver, all eight drivers might be active 275 ma simultaneously c. resistive load and t ambient till 85c i_o max. m per hs driver, all eight drivers might be active s 350 ma ut_on_ aximum output imultaneously m e aximum output per one hs driver, only one can b active 650 ma maximum output per hs driver, only two hs drivers f b usly 500 ma rom a different pair can e active simultaneo m aximum output per one hs driver pair 830 ma note: t parameters ab e are no ar e guaranteed by design. the ov tatio ns need to be respected at all times. ent specified in table 8 cannot always be obtained. the practically obtainable maximum drive current heavily rmal design of the application pcb (see section 8.2 ). with tsd_h = 130c and r according to table 5 . 6.1. short-circuit diagnostics ns of the device and stores the result in t he .6.2. thermal shutdown (tsd) diagnostic ff (see table 9 ). the tsd error condition is active until it is reset by the ne xt correct communication on spi interface (i.e. number of clock pu lses during wr=0 is divisible by 8), provided that the dev ice has cooled down under the tsd trip point. table 9: out diagnostics he ov t tested in production but erall current capability limi the maximum curr depends on the the the available power in the package is: (tsd_h - t_ambient) / r thja thja 8 .5 charge pump the high-side drivers use floating ndmos transistors as power devices . to provide the gate voltages for the ndmos of the high-side drivers, a charge pump is integr ated. the storage capacitor is an external one. the charge pump oscillator has typical frequenc y of 4mhz. 8.6 diagnostics 8. t he diagnostic circuit in the amis-39100 moni tors the actual output status at the pi diagnostic register which is then latched in the output register at the rising edge of the wr-pin. each driver has its correspo nding diagnostic bit diag_x. by comparing the act ual output status (diag_x) with the reques ted driver status (cmd_x) you can diagnos e the correct operation of the application according to table 9 . 8 in case of tsd activation, all bits diag 1 to diag 8 in the spi output register are set into the fault state and all drivers wi ll be switched o requested driver status cmd_x actual output status diag_x diagnosis on 1 high 1 normal state on 1 low 0 short to ground or tsd (2) off 0 high 1 short to vb or missing load (1) or tsd (2) off 0 low 0 normal state (1) notes: (1) the correct diagnostic information is available after t_diagnostic_off time. (2) all 8 diagnostic bits diag_x must be in th e fault condition to conclude a tsd diagnostic. rev. 3 | page 11 of 19 | www.onsemi.com
amis-39100 8 und loss d n, the nd output shor to ground at the s ame time. 8 loss t loss .6.3. gro ue to its desig amis-39100 is protec ted for withstanding module ground loss a driver ted .6.4. powe r able 10: power vddn vb possible case actio n 0 0 nothing system stopped 0 1 start case or sleeping mode with missing vddn eight switches in off-s the tate power down con sumption on vs 1 0 eight switches in the off-state normal consump missing vb supply vddn normally present tion on vddn 1 1 system functional nominal functionality 8.7 spi interface t h e serial peripheral interface (spi) is used to allow an exter nal microcontroller (mcu) to com amis-39100 always acts as a slave and it can?t initiate any transmission. municate with the device. the .7.1. spi transfer format and pin signals ming s are shown in figure 6 and figure 7 . d data is sim ock e (clk) synch izes sh ifting and s formation on th he tp ut from the amis-39100 to the e din signal is th cts the amis-39100 for communication a used as a chip sel . i 00 is not selecte d, dout is in hig dance state and it d lwa ifts data out o the r ising edge and samples the input data also o spi port must be conf igured to match this operati on. ock idles high between the transferred bytes. he diagram in figure 7 represents the spi timing diagram for 8-bit communication. ommunication starts with a falling edge on the wr-pin which latc hes the status of the diagnostic register into the spi output register. ubsequently, the cmd_x bits ? r epresenting the newly requested driv er status ? are shifted into the input register and simulta neously, e diag_x bits ? representing the actual ou tput status ? are shifted out. the bits ar e shifted with x=1 first and ending with x=8. at the sing edge of the wr-pin, the data in the input register is latched into the command register and all drivers are simultaneous ly witching to the newly requested status. spi communication is ended. case the spi master does only support 16-bit communication, then the master must first send 8 clock pulses with dummy din da ta nd ignoring the dout data. for the next 8 clock pulses the above description can be applied. he required timing for serial to peripheral interface is shown in table 11 . 8 t lock diagram and ti he spi b characteristic uring an spi transfer, ultaneously sent to and rece ived from the device. a serial cl lin ron ampling of the in xternal mcu and e two serial data lines (din and dout). dout signal is t e input fr om the mcu to the amis-39100. the wr-p in sele ou nd can also be h impe ect (cs) in a multiple-slave system. the wr-pin is active low oes not interfere with spi bus activities. si nce amis-39100 a n the rising edge of the clk sign al, the mcu f amis-391 ys sh n spi cl t c s th ri s in a t rev. 3 | page 12 of 19 | www.onsemi.com
amis-39100 table 11: digital characteristics symbol description min. max. unit t_clk maximum applied clock frequency on clk input 500 khz t_data_ready time between falling edge on wr and first bit of data ready on dout output (driver going from hz state to ou tput of first diagnostic bit) 2 s t_clk_first first clock edge from falling edge on wr 3 s t_setup (1) set-up time on din 20 ns t_hold (1) hold time on din 20 ns t_data_next time between rising edge on clk and next bit ready on dout (capa on dout is 30pf max.) 100 ns t_spi_end time between last clk edge and wr rising edge 1 s t_risefall rise and fall time of all applied signals (maximum loading capacitance is 30pf) 5 20 ns t_wr time between two rising edge on wr (repetition of the same command) 300 s note: (1) guaranteed by design normal mode verification: x the command is the set of eight bits loaded via spi, wh ich drives the eight hs drivers on or off. x the command is activated with rising edge on wr pin. able 12: digital characteristics t symbol description min. max. unit t_command_l_max. (1) minimum time between two opposite commands for inductive loads and maximum hs driver current of 275ma 1 s t_command_r (1) minimum time between two opposite commands for resistive loads and maximum hs driver current of 350ma 2 ms t_pdb_recov the time between the rising edge on the pdb input and 90 percent of vb-1v on all hs driver outputs. (all drivers are activated, pure resistive load 35ma on all outputs) 1 ms note: (1) guaranteed by design rev. 3 | page 13 of 19 | www.onsemi.com
rev. 3 | page 14 of 19 | www.onsemi.com amis-39100 figure 5: timing for power-down recovery cmd8 cmd1 cmd driver diag 8 diag 1 state diag cmd8 cmd1 memo cmd diag 8 diag 1 memo diag outx high side driver cmdx diagx dout din input register output register command reg ister dia gnostic register figure 6: spi block diagram
amis-39100 1 2 3 4 5 6 7 8 transfer data from diagnostic registers to the output registers falling edge on w r transfer from input registers to the command registers (rising edge on w r) cmd 1 cmd 2 cmd 3 cmd 4 cmd 8 diag 1 diag 2 diag 3 diag 4 diag 8 cmd 6 cmd 5 cmd 7 din : driver command out dout: outputs the state of diagnostics in diag 5 diag 6 diag 7 high z high z w r clk din dout out1 to 8 figure 7: timing diagram rev. 3 | page 15 of 19 | www.onsemi.com
amis-39100 d delivery 9.0 a ssembly an figure 8: package outline drawing rev. 3 | page 16 of 19 | www.onsemi.com
amis-39100 10.0 soldering 1 0.1 introduction to solder ing surface mount packages his text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in the amis ?data circuit packages? (document order numbe r 9398 652 90011). there is no soldering method that is ideal for a mount ic packages. wave solderin g is not always suita unt ics, or for printed-circuit boards with high population densities. in these situations reflow solder ften used. 1 ring w soldering requires solder paste (a suspension of fine so lder particles, flux and binding agent) to be applied to the pr inted-circuit nd non-wetting can pres ent major problems. to overcome these problems the double-wave oldering method was specifically developed. ing conditions must be observed for optimal results: ethod comprising a turbulent wave wi th high upward pressure followed by a smooth laminar wave. ? for packages with leads on two sides and a pitch (e): o larger than or equal to 1.27mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of t-circuit board; smaller than 1.27mm, the footprint longit udinal axis must be parallel to the trans port direction of the printed-circuit ard. the footp orate so lder thieves at the downstream end. r packa ads on fou a 45 angle to the transport direct ion of the printed-c ircuit ard. the footprint must incorp uring placement and before soldering, t he package must be fixed with a droplet of adhesive. the adhesive can be applied by scr een printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is fo ur seconds at 250c. a mildly-activated flux will eliminate the n eed for removal of corrosive residues in most applications. t handbook ic26; integrated ll surface ble for surface mo ing is o 0.2 re-flow solde re-flo bo ard by screen printing, stenciling or pressure-syringe dispensi ng before package placement. several methods exist for re-flow ing; for example, infrared/convection heating in a co nveyor type oven. throughput times (preheat ing, soldering and cooling) vary between 100 an d 200 seconds depending on heating method. typical re -flow peak temperatures range from 215 to 260c. 10 .3 wave soldering co nventional single wave soldering is not recommended for surfac e mount devices (smds) or printed-circuit boards with a high omponent density, as solder bridging a c s if w ave soldering is used the follow ? use a double-wave soldering m the prin o bo rint must incorp ? fo ges with le r sides, t he footprint must be placed at bo orate solder thieves downstream and at the side corners. d rev. 3 | page 17 of 19 | www.onsemi.com
amis-39100 0.4 manual soldering osite end leads. use a low voltage (24v or less) soldering iron applied to the flat nds at up to 300c. when using a dedicated tool, all other leads can be soldered in one operation within two to five seconds between 270 and 320c. able 13: soldering process 1 fix t he component by first soldering two diagonally-opp part of the lead. contact time must be limited to 10 seco t package soldering method wave re-flow (1) bga, sqfp not suitable suitable hlqfp, hsqfp, hsop, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable n otes: 1. all smd packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called p opcorn effect). for details, refer to the dry pack information in the ?data handbook ic26; int egrated circuit packages; section: packing methods?. 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bott om version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package fo otprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8mm; it is defini tely not suitable for packages with a pitch (e) equal or smaller than 0.65mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65mm; it is definitel y not suitable for packages with a pitch (e) equal to or smaller than 0.5mm. 1.0 revision history 1 t able 14: revision history r evision date description 1 .0 various initial document 2 .0 june 2006 document formatted into new amis template 3 .0 january 2007 update some values in table 1, 2, 3, 6 and 7. update explanation in paragraph 8.6 and paragraph 8.7. update figure 8. added section 10.0 rev. 3 | page 18 of 19 | www.onsemi.com
rev. 3 | page 19 of 19 | www.onsemi.com amis-39100 12.0 11b company or product inquiries for more information about on semiconductor?s products or services visit our web site at http://www.onsemi.com. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes witho ut further notice to any products herein. scillc makes no warranty, representation or guarantee regardin g the suitability of its products for any parti cular purpose, nor does scillc assume any liability arising out of the application or use of any pr oduct or circuit, and specific ally disclaims any and all liability, including without li mitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actu al performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surg ical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal op portunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information literature fulfillment: literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone: 303-675-2175 or 800-344-3860 toll free usa/canada fax: 303-675-2176 or 800-344-3867 toll free usa/canada email: orderlit@onsemi.com n. american technical support: 800-282-9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81-3-5773-3850 on semiconductor website: www.onsemi.com order literature: http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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